EDN

Using PLLs to Obtain Carrier Synchronization: Part 2

An important task for a digital communications receiver is to remove any frequency/phase offsets that might exist between the transmitter and receiver oscillators. Designers typically implement a ...
Design-Reuse

Phase detector 375mhz reference IP Listing

180TSMC_PFD_04 is a phase-frequency detector (PFD) forms control signal for VCO tuning. PFD compares phases of divided VCO signal and divided reference oscillator signal and detects phase difference. ...
Design-Reuse

Unlock and Load: Characterizing Today's PLLs

The phase-locked loop (PLL) has become one of the most versatile tools in the communication sector. PLLs are at the heart of circuits and devices ranging from clock recovery blocks in data ...
Electronic Design

Phase Coherent Signal Testing

Phase coherence, that is a stable phase relationship between signals, is essential when making measurements that require more than one RF output. While this was once primarily required when evaluating ...
EDN

Good behavioral model simulation: key to predicting first-order PLL synthesizer performance (Part 1 of 2)

In this article, the phase noise of a closed-loop, phase-locked loop (PLL) synthesizer is simulated using Agilent RF Design Environment (RFDE) and Advanced Design System (ADS) tools. The critical ...