Philippe Luc, director of verification at Codasip, talked to students of the UK Electronics Skills Foundation (UKESF) about what it is like to be a verification engineer. On one hand the UKESF ...
Experts At The Table: The pressure on verification engineers to ensure a device will function correctly has increased exponentially as chips become more complex and heterogeneous. Semiconductor ...
Groundbreaking benefits of using artificial intelligence in design verification. How SHAPley values can help engineers optimize debugging in design verification. Achieving low-latency SoC ...
The rise of 5G and satellite connectivity is creating new roles in the semiconductor industry. Engineering students with an ...
This article is part of the TechXchange: Addressing Chip Verification Challenges. According to Siemens EDA, its latest software platform, partly powered by machine learning (ML), improves the ...